Services

• IPC Standards, MIL Standards , Space Standards & Customized Standards
• Complete expertise in managing various data formats
• DFM preparation (Check Gerber data and given Analysis report to manufacturer about PCB design).
• Single image preparation (Single Sided, Double Sided ,Multi-Layer up to 42 Layer)
• Build-up Suggestion & Impedance Calculation
• Design rule check and error correction as per your manufacturing standards
• Standard and Special Array creation
• Special CAM Preparation & process

• Data with Controlled Impedance
• HDI Boards
• RF & MICROWAVES Boards
• Blind-Buried technology
• Flex & Flex-Rigid technology
• Gold Finger, Hard Gold on Base copper , Edge Plating
• Vias filled and capped / Cu filled & stacked Micro via
• Edge Castellation holes / stamp technology
• Press fit Technology, CSK
• Heat Sink/Drain, CSK, Back drill, Depth Drill etc...

• Panel Image preparation

• Flip/Flop , Multi board Panel Arrangement
• Drill/Rout /scoring output
• Coupon placement

• Electrical Test programs ATG , Emma, Probot , MNF1 ,MNF2 , etc.
• AOI output
• FAI report

• Full-fledged and dedicated CAM facility for the post processing of Gerber data (Pre Manufacturing)
• 24/7 services to cater to the requirements of customers world wide
• State of the art Software/Hardware and Communication infrastructure
• Single layer to multi-layer as per IPC standard (up to 42 layers)
• Surface mount, Ball Grid Array & Through hole designs with blind and buried vias
• Split ground planes and power planes for mixed signals
• High speed design, early analysis and design optimization
• Post layout analysis for signal integrity, impedance match
• Net list Analysis
• Reliability Analysis
• Thermal Analysis
• Editing and Optimization
• Rout and retain
• Step and repeat with break-away tabs
• Slots, Scoring, V-cuts, Routing
• Tear dropping
• Multiple circuit panelization
• Creation of test coupons

We are running large number of DFM (Design for Manufacturability) actions on various layers, such as Copper layers, Solder Mask, Silk Screen layers, Drill layers to ensure productivity.

Some DFM operations that we carry out are:

• Net List File
• Schematic (Adobe PDF preferred)
• Board Outline Drawing
• Bill of Materials (Excel format preferred)
• Data Sheet for Parts with More Than 2 Pins
• Critical Component Locations (if applicable)
• Trace width, clearance (spacing), via drill size, ring size, etc.
• Critical Routing Constraints (if applicable)
• Anticipated Number of Layers (if known)

• Layer alignment
• Draws to flash.
• Pad Registration.
• NFP Removal
• Redundant pad and line removal.
• Line unification.
• Countrization of self-intersecting polygons.
• Sliver in acute angles.
• SMD attributes.
• Legend Detection.

• Netlist comparison of IPC netlist and CAD data.
• Netlist comparison with processed data and customer data.

• Missing Hole, Extra Hole or Close Holes.
• Touching Holes/Duplicate Holes.
• Checking for 2nd drill option.
• Minimum spacing between two conductors.
• Minimum Track width.
• Minimum Annular ring.
• Drill/rout to conductor spacing.
• Sliver.
• Thermal air gap/spoke width.
• Drill to copper plane spacing.
• Plane shearing line width.
• Mask annular ring for copper pad.
• Expose trace.
• Mask to copper spacing.
• Legend width.

We run an exhaustive list of design rule checks for all boards to avoid error that can possibly cause board scrap. All features are thoroughly checked for violations before the board is panelized.

Some of the checks are:

• Mismatch between Fabrication Drawing and Gerber.
• Separation between segments.
• Minimum track width.
• Open trace/Hanging traces.
• Power to ground short detection.
• Annular ring verification.
• Distance between holes to copper segment.
• Expose Trace.
• Spacing issue.

• Power ground optimization.
• Signal layer optimization.
• Teardrop creation.
• Solder mask optimization.
• Legend overlap.
• Copper Balancing.
• Etch Compensation.

• Gold Finger, Hard Gold on Base Copper , Edge plating
• Controlled Impedance.
• Via-plug, Peelable mask, Carbon Ink.
• Flip flop panelization.
• Edge Castellation holes / stamp technology.
• Flex & Flex Rigid programs.
• Cover layer and Stiffener programs.

• Step and Repeat of Board on Large panel.
• Venting pattern.
• Tooling holes/Registration Targets/ Punch targets.
• Coupons for Control Impedance jobs.
• Compensation for lamination shrinkage.

• NC Drill and rout programs.
• After drill and before etching rout program for plated edges.
• Second stage drill program.
• Counter bore/Counter /sink.
• Panel with Tab rout/Break out pips.
• Peck Drill/G85.
• Control Depth Rout.
• Score Program.
• Tool path generation.
• Cover layer and Stiffener programs.

• Scripting – This enables the customer to acquire the necessary scripts they need for their production requirements in their Genesis system.
• Hyper tooling – This is a JAVA based program that can be developed to be used in UCAM to automate some routinely tasks in tooling.
• Tooling – This is accomplished through a pool of engineers who are able to process design data from data input, perform cleanup, carry out DRC/DFM and board edits, and perform any tasks up to output.